The Doherty power amplifier (PA) has played a central role in the evolution of microwave and wireless transmitters, combining a simple and elegant circuit concept with a lasting impact on the efficiency of high-power amplification. On the occasion of the 90th anniversary of its invention, this workshop will celebrate the Doherty architecture, tracing its development from the original concept to its widespread adoption in modern communication systems. The workshop will bring together experts to review the fundamental operating principles of the Doherty PA, its historical evolution, and the key technological advances that have enabled its continued use across generations of wireless standards.

The workshop will feature five invited talks addressing the major challenges and developments that have shaped the modern Doherty PA. The first talk will review its history and fundamental working principle, establishing the foundations for the subsequent discussions. The following talks will examine the intrinsic bandwidth limitations of the architecture and approaches for bandwidth enhancement, its linearity and techniques for mitigating nonlinear distortion, and extensions of the Doherty concept toward deeper power back-off. The final talk will cover practical measurements and linearization techniques, bridging circuit-level concepts with the characterization and implementation of complete amplifier systems. Together, these contributions will provide a comprehensive perspective on 90 years of Doherty PA innovation and its prospects for future wireless and microwave applications.

Cryogenic RF on-wafer measurements of superconducting and semiconductor devices at 4 K are increasingly important for developing the control and readout architectures required for scalable quantum computing. This workshop will bring together leading perspectives from national metrology, instrumentation, and academic research to review recent progress in cryogenic on-wafer S-parameter and noise measurements. Through four talks – two focused on S-parameter measurements and two focused on noise and noise-parameter characterisation – attendees will gain a concise overview of the current state of the art, key practical challenges, and emerging solutions for accurate RF characterisation at cryogenic temperatures.

The ongoing research into Full Duplex (FD) is driven by its significant potential benefits for future wireless generations, including 5Ga and 6G. If successfully implemented, FD could double the effective capacity of a given slice of radio spectrum and significantly reduce communication latency because data wouldn’t need to wait for alternating transmit/receive slots. This technology is seen as a promising enabler for 5Ga and 6G wireless networks, particularly in applications such as intelligent transportation systems and fixed wireless access, where higher power and less-constrained form factors can make implementation easier. In this workshop, entitled Development of a full-duplex wireless system with self-interference cancellation, several experts will present various approaches to cancel the inherent self-interference caused by their own transmitters. The presentations are organised around the workshop’s overarching themes.

One presentation is dedicated to the Full Duplex for Narrowband Analog VHF/UHF radios: Challenges and Opportunities. Another presentation will examine the CMOS Simultaneous Transmit and Receive (STAR) Front Ends for Dual-Use Commercial and Defence Applications, with a particular focus on techniques such as antenna self-interference suppression, RF and analogue time-domain and frequency-domain cancellers, digital self-interference cancellation algorithms, and canceller adaptation algorithms. A subsequent presentation will examine the investigation and development of a wideband mmWave (same channel) full-duplex (FD) wireless system design with dual receivers, featuring all-analogue domain self-interference cancellation (SIC). Furthermore, the workshop examines on the use of full-duplex principles in wideband retrodirective arrays (RDAs).

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